; Define the set of instruction sets available on a platform
; Format is
;
; Add new instruction set
; instructionset,<architecture>,<managed name>,<r2r name if different>,<R2R numeric value>, <jit instruction set name>, <public name>
;
; The public name is intended to match with mono for specifying what the name of the instruction set is. These names match names produced by other compilers as well.
;
; Add jit 64bit architecture specific instruction set when instruction set is available
; instructionset64bit,<architecture>,<jit instruction set name>
;
; Note that a instruction set is a "Vector" instruction set. A vector instruction set may only imply a single other instruction set
; vectorinstructionset,<architecture>,<jit instruction set name>
;
; Add an instruction set implication (i.e, if instruction set A is present, then instruction set B must be present too.)
; implication,<architecture>,<jit instruction set name>,<implied jit instruction set name>
;
; Copy instruction sets defined for other architecture at this point in the file.
; copyinstructionsets,<architecture>,<copytoarchitecture>

; UPDATE JIT/EE INTERFACE GUID WHEN CHANGING THESE DEFINITIONS. The instruction set definitions are part of JIT/EE interface contract.

; DO NOT CHANGE R2R NUMERIC VALUES OF THE EXISTING SETS. Changing R2R numeric values definitions would be R2R format breaking change.

; Definition of X86 instruction sets
definearch         ,X86   ,32Bit     ,X64

instructionset     ,X86   ,X86Base   ,        ,22 ,X86Base  ,base
instructionset     ,X86   ,Sse       ,        ,1  ,SSE      ,sse
instructionset     ,X86   ,Sse2      ,        ,2  ,SSE2     ,sse2
instructionset     ,X86   ,Sse3      ,        ,3  ,SSE3     ,sse3
instructionset     ,X86   ,Ssse3     ,        ,4  ,SSSE3    ,ssse3
instructionset     ,X86   ,Sse41     ,        ,5  ,SSE41    ,sse4.1
instructionset     ,X86   ,Sse42     ,        ,6  ,SSE42    ,sse4.2
instructionset     ,X86   ,Avx       ,        ,7  ,AVX      ,avx
instructionset     ,X86   ,Avx2      ,        ,8  ,AVX2     ,avx2
instructionset     ,X86   ,Aes       ,        ,9  ,AES      ,aes
instructionset     ,X86   ,Bmi1      ,        ,10 ,BMI1     ,bmi
instructionset     ,X86   ,Bmi2      ,        ,11 ,BMI2     ,bmi2
instructionset     ,X86   ,Fma       ,        ,12 ,FMA      ,fma
instructionset     ,X86   ,Lzcnt     ,        ,13 ,LZCNT    ,lzcnt
instructionset     ,X86   ,Pclmulqdq ,        ,14 ,PCLMULQDQ,pclmul
instructionset     ,X86   ,Popcnt    ,        ,15 ,POPCNT   ,popcnt
instructionset     ,X86   ,          ,        ,   ,Vector128,
instructionset     ,X86   ,          ,        ,   ,Vector256,
instructionset     ,X86   ,AvxVnni   ,        ,25 ,AVXVNNI  ,avxvnni
instructionset     ,X86   ,Movbe     ,        ,27 ,MOVBE    ,movbe
instructionset     ,X86   ,X86Serialize ,     ,28 ,X86Serialize  ,serialize

instructionset64bit,X86   ,X86Base
instructionset64bit,X86   ,SSE
instructionset64bit,X86   ,SSE2
instructionset64bit,X86   ,SSE3
instructionset64bit,X86   ,SSSE3
instructionset64bit,X86   ,SSE41
instructionset64bit,X86   ,SSE42
instructionset64bit,X86   ,AVX
instructionset64bit,X86   ,AVX2
instructionset64bit,X86   ,AES
instructionset64bit,X86   ,BMI1
instructionset64bit,X86   ,BMI2
instructionset64bit,X86   ,FMA
instructionset64bit,X86   ,LZCNT
instructionset64bit,X86   ,PCLMULQDQ
instructionset64bit,X86   ,POPCNT
instructionset64bit,X86   ,AVXVNNI
instructionset64bit,X86   ,MOVBE
instructionset64bit,X86   ,X86Serialize

vectorinstructionset,X86  ,Vector128
vectorinstructionset,X86  ,Vector256

implication        ,X86   ,SSE       ,X86Base
implication        ,X86   ,SSE2      ,SSE
implication        ,X86   ,SSE3      ,SSE2
implication        ,X86   ,SSSE3     ,SSE3
implication        ,X86   ,SSE41     ,SSSE3
implication        ,X86   ,SSE42     ,SSE41
implication        ,X86   ,AVX       ,SSE42
implication        ,X86   ,AVX2      ,AVX
implication        ,X86   ,AES       ,SSE2
implication        ,X86   ,BMI1      ,AVX
implication        ,X86   ,BMI2      ,AVX
implication        ,X86   ,FMA       ,AVX
implication        ,X86   ,LZCNT     ,X86Base
implication        ,X86   ,PCLMULQDQ ,SSE2
implication        ,X86   ,POPCNT    ,SSE42
implication        ,X86   ,Vector128 ,SSE
implication        ,X86   ,Vector256 ,AVX
implication        ,X86   ,AVXVNNI   ,AVX2
implication        ,X86   ,MOVBE     ,SSE42
implication        ,X86   ,X86Serialize, X86Base

; Definition of X64 instruction sets
definearch         ,X64   ,64Bit     ,X64

copyinstructionsets,X86   ,X64

; Definition of Arm64 instruction sets
definearch         ,ARM64 ,64Bit     ,Arm64

instructionset     ,ARM64 ,ArmBase   ,        ,16 ,ArmBase  ,base
instructionset     ,ARM64 ,AdvSimd   ,        ,17 ,AdvSimd  ,neon
instructionset     ,ARM64 ,Aes       ,        ,9  ,Aes      ,aes
instructionset     ,ARM64 ,Crc32     ,        ,18 ,Crc32    ,crc
instructionset     ,ARM64 ,Dp        ,        ,23 ,Dp       ,dotprod
instructionset     ,ARM64 ,Rdm       ,        ,24 ,Rdm      ,rdma
instructionset     ,ARM64 ,Sha1      ,        ,19 ,Sha1     ,sha1
instructionset     ,ARM64 ,Sha256    ,        ,20 ,Sha256   ,sha2
instructionset     ,ARM64 ,          ,Atomics ,21 ,Atomics  ,lse
instructionset     ,ARM64 ,          ,        ,   ,Vector64 ,
instructionset     ,ARM64 ,          ,        ,   ,Vector128,
instructionset     ,ARM64 ,          ,        ,   ,Dczva    ,
instructionset     ,ARM64 ,          ,Rcpc    ,26 ,Rcpc     ,rcpc

instructionset64bit,ARM64 ,ArmBase
instructionset64bit,ARM64 ,AdvSimd
instructionset64bit,ARM64 ,Aes
instructionset64bit,ARM64 ,Crc32
instructionset64bit,ARM64 ,Dp
instructionset64bit,ARM64 ,Rdm
instructionset64bit,ARM64 ,Sha1
instructionset64bit,ARM64 ,Sha256

vectorinstructionset,ARM64,Vector64
vectorinstructionset,ARM64,Vector128

implication        ,ARM64 ,AdvSimd   ,ArmBase
implication        ,ARM64 ,Aes       ,ArmBase
implication        ,ARM64 ,Crc32     ,ArmBase
implication        ,ARM64 ,Dp        ,AdvSimd
implication        ,ARM64 ,Rdm       ,AdvSimd
implication        ,ARM64 ,Sha1      ,ArmBase
implication        ,ARM64 ,Sha256    ,ArmBase
implication        ,ARM64 ,Vector64  ,AdvSimd
implication        ,ARM64 ,Vector128 ,AdvSimd


;                    ,name and aliases           ,archs    ,lower baselines included by implication
;
instructionsetgroup  ,x86-x64                    ,X64 X86  ,sse2
instructionsetgroup  ,x86-x64-v2                 ,X64 X86  ,sse4.2 popcnt
instructionsetgroup  ,x86-x64-v3                 ,X64 X86  ,x86-x64-v2 avx2 bmi bmi2 lzcnt movbe fma
instructionsetgroup  ,skylake                    ,X64 X86  ,x86-x64-v3

instructionsetgroup  ,armv8-a                    ,ARM64    ,neon
instructionsetgroup  ,armv8.1-a                  ,ARM64    ,armv8-a lse crc rdma
instructionsetgroup  ,armv8.2-a                  ,ARM64    ,armv8.1-a
instructionsetgroup  ,armv8.3-a                  ,ARM64    ,armv8.2-a rcpc
instructionsetgroup  ,armv8.4-a                  ,ARM64    ,armv8.3-a dotprod
instructionsetgroup  ,armv8.5-a                  ,ARM64    ,armv8.4-a
instructionsetgroup  ,armv8.6-a                  ,ARM64    ,armv8.5-a

; Technically, apple-m1 is v8.5+
instructionsetgroup  ,apple-m1                   ,ARM64    ,armv8.5-a
